Current Issue : April - June Volume : 2021 Issue Number : 2 Articles : 5 Articles
The main topic of this paper is low-cost public key cryptography in wireless sensor nodes. Security in embedded systems, for example, in sensor nodes based on field programmable gate array (FPGA), demands low cost but still efficient solutions. Sensor nodes are key elements in the Internet of Things paradigm, and their security is a crucial requirement for critical applications in sectors such as military, health, and industry. To address these security requirements under the restrictions imposed by the available computing resources of sensor nodes, this paper presents a low-area FPGA-prototyped hardware accelerator for scalar multiplication, the most costly operation in elliptic curve cryptography (ECC). This cryptoengine is provided as an enabler of robust cryptography for security services in the IoT, such as confidentiality and authentication. The compact property in the proposed hardware design is achieved by implementing a novel digit-by-digit computing approach applied at the finite field and curve level algorithms, in addition to hardware reusing, the use of embedded memory blocks in modern FPGAs, and a simpler control logic. Our hardware design targets elliptic curves defined over binary fields generated by trinomials, uses fewer area resources than other FPGA approaches, and is faster than software counterparts. Our ECC hardware accelerator was validated under a hardware/software codesign of the Diffie-Hellman key exchange protocol (ECDH) deployed in the IoT MicroZed FPGA board. For a scalar multiplication in the sect233 curve, our design requires 1170 FPGA slices and completes the computation in 128820 clock cycles (at 135.31 MHz), with an efficiency of 0.209 kbps/slice. In the codesign, the ECDH protocol is executed in 4.1 ms, 17 times faster than a MIRACL software implementation running on the embedded processor Cortex A9 in the MicroZed. The FPGA-based accelerator for binary ECC presented in this work is the one with the least amount of hardware resources compared to other FPGA designs in the literature....
In this paper, we present a proposed field programmable gate array (FPGA)-based timeto- digital converter (TDC) architecture to achieve high performance with low usage of resources. This TDC can be employed for multi-channel direct Time-of-Flight (ToF) applications. The proposed architecture consists of a synchronizing input stage, a tuned tapped delay line (TDL), a combinatory encoder of ones and zeros counters, and an online calibration stage. The experimental results of the TDC in an Artix-7 FPGA show a differential non-linearity (DNL) in the range of [−0.953, 1.185] LSB, and an integral non-linearity (INL) within [−2.750, 1.238] LSB. The measured LSB size and precision are 22.2 ps and 26.04 ps, respectively. Moreover, the proposed architecture requires low FPGA resources....
In order to implement the acquisition and processing of signals from imaging systems, a data acquisition system based on FPGA was designed with the requirements of multi-channel, high-resolution and compactness. The data acquisition (DAQ) system uses a quad-channel 12-bit analog-to-digital converter (ADC) AD9228-65 as the front-end core chip, and a series of signal conditioning circuits to form the front-end system. FPGA is used as the data acquisition, logic control, data readout and processing. After preliminary testing, the DAQ system has the advantages of low power, low cost, high-speed, small size....
Smart home technologies are growing actively all around the world. As a result, great pressures are imposed on internet of things networks by dynamic traffic and plenty of devices. The passive optical network is considered one of the most promising fronthaul technologies. In particular, the time and wavelength division multiplexing passive optical network has shown the advantage of high capacity and received attention recently. In support of internet of things networks, the energy and transmission efficiency has emerged as an important issue on the time and wavelength division multiplexing passive optical network enabled fronthaul networks. In this paper, we try to enhance the energy and transmission efficiency of the time and wavelength division multiplexing passive optical network enabled reconfigurable fronthaul. Fronthaul links’ load balancing is also taken into consideration. An integer non-linear programming model is employed to formulate the joint optimization problem. We also provide an adaptive genetic algorithm-based approach with fast convergence. The simulation results show that the active units of fronthaul can be dynamically switched on/off with the traffic variation and a significant energy saving is achieved. In addition, the maximum transmission efficiency increases by 87% with integer non-linear programming method in off-peak periods....
Quantization of the weights and activations of a neural network is a way to drastically reduce necessary memory accesses and to replace arithmetic operations with bit-wise operations. This is especially beneficial for the implementation on field-programmable gate array (FPGA) technology that is particularly suitable for embedded systems due to its low power consumption. In this paper, we propose an in-situ defect detection system utilizing a quantized neural network implemented on an FPGA for an automated surface inspection of wind turbine rotor blades using unpiloted aerial vehicles (UAVs). Contrary to the usual approach of offline defect detection, our approach prevents major downtimes and hence expenses. To our best knowledge, our work is among the first to transfer neural networks with weight and activation quantization into a tangible application. We achieve promising results with our network trained on our dataset consisting of 8024 good and defected rotor blade patches. Compared to a conventional network using floating-point arithmetic, we show that the classification accuracy we achieve is only slightly reduced by approximately 0.6%. With this work, we present a basic system for in-situ defect detection with versatile usability....
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